1. Field of the Invention
The present invention relates to a method for estimating the yield of an LSI satisfying predetermined standards of a frequency operation.
2. Description of the Related Art
A plurality of LSIs are formed on a wafer segmented from a lot, and each LSI is segmented from the wafer, thereby producing LSIs. However, an LSI has a different frequency characteristic depending on which portion of a wafer it is formed although a plurality of LSIs are produced on the same wafer. Therefore, each LSI chip formed on the same wafer has a variance in frequency characteristic although a plurality of LSI chips are formed on the same wafer. Similarly, since a number of wafers are segmented from one lot, each wafer indicates a variance in frequency characteristic among the chips of LSIs. Especially, an ultrafast LSI chip in the forefront of technology cannot be designed with sufficient specifications of an LSI, but is designed by setting the specifications of the LSI close to a requested operation frequency.
When the operation frequency of an LSI is low, the specifications of the operation frequency can be set higher than a requested operation frequency at the designing stage with the yield of the LSI (yield of the LSI satisfying a predetermined frequency characteristic) taken into account, and designed and produced. Therefore, the yield of the LSI satisfying the requested operation frequency characteristic is high, the number of LSIs to be discarded to satisfy the operation frequency characteristic after the purchase of the LSI can be low, and a wasteful cost can be reduced.
However, since the specification of the operation frequency of an LSI operating at an ultrafast speed cannot be set sufficiently higher than a requested operation frequency at the designing stage, the yield of the LSI satisfying the requested operation frequency becomes lower. Therefore, the yield of the LSI satisfying the requested operation frequency is low and the number of LSIs available for producing a desired device is small. Accordingly, in this case, the yield of the LSI is estimated in advance, the number of LSIs larger than a necessary number are purchased on the basis of the estimated yield, and the LSIs available for a desired device are selected from among the purchased LSIs and used. However, if the yield of the LSI is not correctly estimated, there is a shortage of LSIs or redundant LSIs, thereby incurring an undesired cost condition.
The patent document 1 describes a method for estimating the yield of an integrated circuit. The patent document 2 describes a high-precision simulation method in producing a semiconductor device. The patent document 3 describes a method for enhancing the yield in the semiconductor integrated circuit printing process.                [Patent Document 1] Japanese Patent Application Publication No. H10-294247        [Patent Document 2] Japanese Patent Application Publication No. H11-330449        [Patent Document 2] Japanese Patent Application Publication No. 2001-159809        
As described above, it is conventionally necessary to estimate the yield of an LSI in advance, and purchase a larger number of LSIs than they are required, and the estimation has depended on the experience and guesswork of a user.